Friday Morning Sessions (June 28) TMS Logo

About the 1996 Electronic Materials Conference: Friday Morning Sessions (June 28)

June 26-28, 1996 · 38TH ELECTRONIC MATERIALS CONFERENCE · Santa Barbara, California

Session AA: Si/SiGe: Defects, Processing and CVD

Session Chairman: Harry Atwater, Caltech, Department of Applied Physics, MS 128-95, Pasadena, CA 91125. Co-Chairman: James C. Sturm, Department of Electrical Engineering, Princeton University, Princeton, NJ 08544

8:20AM, AA1

"Studies of Electrically Active Defects in Relaxed GeSi Films Using a Near-Field Scanning Optical Microscope:" J.W.P. HSU, Q. Xu, Department of Physics, University of Virginia, Charlottesville, VA 22901; E.A. Fitzgerald, Department of Materials Science and Engineering, MIT, Cambridge, MA 02139; Y.H. Xie, P.J. Silverman, AT&T Bell Laboratories, 600 Mountain Avenue, Murray Hill, NJ 07974

We report a study on the electrical activity of threading dislocation defects in relaxed GeSi films using a novel, high-resolution optical technique. A near-field scanning optical microscope (NSOM) is used to measure spatially-resolved photoresponse while simultaneously imaging the surface topography. We have convincingly established that shallow topographic depressions in these films are electrically active threading dislocations. The apparent size of the dislocations in the photovoltage images are in agreement with estimates based on the junction geometry and the near-field optical excitation spot size. We can clearly observe photoresponse changes at < 100 nm lateral scale, a ten fold improvement from far-field optical techniques. This higher resolution is due to reduction of the excitation volume and of the carrier lifetime near defects.

In addition to experimental work, we have performed two-dimensional numerical calculations of steady state carrier densities near defects. In our model, the spatial extent of the defects are assumed to be the smallest length scale and treated as delta functions. The carrier diffusion length in bulk Si is used for the defect-free region. A typical NSOM tip diameter and power density are used to determine the photoexcitation area and carrier generation rate. We will show that two defects separated by a distance much less than the diffusion length can be clearly resolved, in agreement with experimental results.

8:40AM, AA2+

"Dislocation Interaction and Doping Compensation in Compositionally Graded GexSi1-x/Si Heterostructures:" P.N. GRILLOT, S.A. Ringel, Electronic Materials & Devices Laboratory, Department of Electrical Engineering, 2015 Neil Avenue, The Ohio State University, Columbus, OH 43210-1272; E.A. Fitzgerald, J. Michel, Department of Materials Science and Engineering, M.I.T., Cambridge, MA 02139

Strain relaxation of GeSi/Si heterostructures is known to generate thermally unstable defect states of both donor-like and acceptor-like character, where the concentration of acceptor-like defect states exceeds the concentration of donor-like states. In this presentation, we demonstrate that the acceptor-like defect states are sufficient in quantity to cause background p-type conductivity in low arsenic doped (n ~ 1 x 1014 cm-3) Ge0.3Si0.70 layers grown on compositionally graded GexSi1-x/Si layers at 650-800oC These p-type layers exhibit low mobility and short carrier diffusion lengths as determined by Hall effect and electron beam induced current measurements. The hole concentration in the p-type region of these films is spatially invariant in the growth direction at ~ 2 x 1014 cm-3, and is not correlated to the dislocation density, which decreases from ~108 cm-2 in the graded region to 7 x 105 cm-2 in the 30% Ge cap layer. A 60 s rapid thermal anneal at 800oC converts the p-type layers to n-type, which is consistent with the background n-type conductivity of GeSi/Si films grown at 850-900oC in the same reactor. Significant improvements in carrier lifetime, and bound exciton luminescence and a decrease in trap concentration accompany this change in conductivity type. These results demonstrate that the dislocations themselves are not responsible for the observed p-type conductivity or poor material quality in the as-grown films, but that thermally unstable defects such as intrinsic point defects or point defect clusters are the dominant source of the observed electrical activity. These thermally unstable defect states will be discussed in terms of dislocation interaction within the graded region, the generation and annihilation of intrinsic point defects, and dangling bond energy and solid solubility limits which provide driving forces toward the formation of point defect clusters.

9:00AM, AA3+

"Improvement in Surface Morphology and Dislocation Structure in Graded Si-Ge/Si Structures Grown on Off-Cut Substrates:" SRIKANTH B. SAMAVEDAM, Eugene A. Fitzgerald, Department of Materials Science and Engineering, Massachusetts Institute of Technology, 77 Massachusetts Avenue, Cambridge, MA 02139

One way of fabricating a larger lattice constant material on Si is to grow relaxed graded structures of Si-Ge. Such relaxed layers can be used for Ge photo-detectors and field effect transistors on Si, as well as templates for III-V integration on Si. Surface morphology and a controlled defect structure are key issues in using these materials in device applications. In this study, Ge/Si-Ge (graded)/Si structures were grown on Si(001) and 6o off-cut (in-plane <110> direction) Si(001) substrates using ultra-high vacuum chemical vapor deposition (UHVCVD) to study the effect of substrate miscut. The surface morphology was characterized using atomic force microscopy (AFM) and the defect structure using transmission electron microscopy (TEM) and electron beam induced current (EBIC). The samples grown on the miscut substrate showed a drastically lower surface roughness and a lower density of dislocation pile-ups. Applying Freund's blocking criterion to graded Si-Ge structures, it was possible to predict the formation of dislocation pile-ups that arise due to the trenches in the cross-hatch pattern. Such pile-ups lead to increased surface roughness by limiting growth along the trenches. The TEM studies revealed that the orthogonal array of 60o dislocations that initially forms to relieve misfit is not the lowest energy configuration of dislocations. At high Ge concentrations in the graded buffer, the growth temperature is closer to the melting point of the Si-Ge alloy. Hence, there is sufficient thermal energy for the 60o dislocations to react and form a lower energy hexagonal dislocation network with in-plane Burgers vectors of the type 1/2<110> and <110>. Such dislocation reactions occurred more easily in the sample grown on the miscut substrate. We show that the intersection of {111} glide planes in the samples grown on miscut substrates aid the dislocation reactions necessary to form this network. There was a substantial improvement in the surface morphology and the defect structure by the use of miscut substrates for the Si-Ge graded layers.

9:20AM, AA4

"Ion Implantation in Epitaxial GexSi1-x on Si (100):" D.Y.C. LIE, M/S 503-109, Semiconductor Systems Division, Rockwell International Corporation, 4311 Jamboree Road, Newport Beach, CA 92658-8902

The question of whether one can effectively dope or process epitaxial Si(100)/GeSi heterostructures by ion implantation is experimentally investigated. Results that cover several different ion species (Si, P, and As), doses (1.0 x 1013/cm2 to 1.5 x 1015/cm2), implantation temperatures (RT. to 150deg.C), as well as annealing techniques (steady-state and rapid thermal annealing) are included in this talk. Implantation-induced damage an strain and their annealing behavior for both strained and relaxed GeSi are measured and compared with those in Si and Ge. The damage and strain generated in pseudomorphic GeSi by room-temperature implantation are considerably higher than the values interpolated from those of Si and Ge. Implantation at slightly elevated substrate temperatures (e.g., 100deg.C) can very effectively suppress the implantation-induced damage and strain in GeSi. The fractions of electricity active dopants in both Si and GeSi are measured and compared for several doses and under various annealing conditions. Solid-phase epitaxial regrowth of GeSi amorphized by implantation has also been studied and compared with regrowth in Si and Ge. For the case of metastable epi-GeSi amorphized by implantation, the pseudomorphic strain in the regrown GeSi is always lost and the layer contains a high density of defects, which is very different from the clean regrowth of Si(100). Solid-phase epitaxy, however, facilitates the activation of dopants in both GeSi and Si, irrespective of the annealing techniques used. For metastable GeSi films that are not amorphized by implantation, rapid thermal annealing is shown to outperform steady-state annealing for the preservation of pseudomorphic strain and the activation of dopants. In general, defects generated by ion implantation can enhance the strain relaxation process of strained GeSi during post-implantation annealing. The processing window that is optimized for ion-implanted Si therefore has to be modified considerably for ion-implanted GeSi.

9:40AM, AA5

"Low Dose BF2 Implantations into Pseudomorphic Metastable Ge0.06Si0.94 on Si (100):" SEONGIL IM, F. Eisen, M.-A. Nicolet, M/S 116-81, California Institute of Technology, Pasadena, CA 91125; N.D. Theodore, Motorola Inc., Mesa, AZ 85202

Thick (260nm) pseudomorphic metastable n-type Ge0.05Si0.94 layers grown by molecular beam epitaxy on n-type Si(100) substrate were implanted at room temperature with 70 keV BF2+ ions to a dose of 3x1013 cm-2, so that a p-n junction is formed in the GeSi layers. The samples were subsequently annealed for a short duration in a lamp furnace with a nitrogen ambient, or for a long duration in a vacuum tube furnace. The Ge concentration, crystalline quality, and strain have been characterized by Rutherford backscattering/channeling spectrometry and double crystal x-ray diffractometry. Crystalline quality and dislocation density were reconfirmed by transmission electron microscopy. The percentage of dopant activation has been measured by Hall effect equipment using van der Pauw sample geometry.

For samples annealed for both 40 s and 30 min at more than 800deg.C, full electrical activation of p-type Ge Si layers was achieved without losing strain in the layers, but those GeSi layers showed a much lower Hall mobility than of p-type Si doped in the same experimental conditions. These results are presumably because the Hall factor of heavily-doped p-type Ge Si films is much less than unity while the Hall factor of heavily doped p-type Si or n-type Ge Si films is close to unity [1,2,3]. When annealed at 900deg.C for 30 min, both of the implanted and unimplanted samples showed some strain relaxation, whereas the samples annealed at the same temperature for 40 s did not show any sign of relaxation.


1) Timothy K. Carns, Sang K. Chun, Martin O. Tanner, Kang L. Wang, Ted I Kamins, John E. Turner, Donald Y.C. Lie, Marc-A. Nicolet, and Robert G. Wilson, IEEE Transactions on Electron Devices, 41, 1273 (1994)
2) J.M. McGREGOR, T. MANKU, J.-P. NOEL, D.J. ROULSTON, A. NATHAN, and D.C. HOUGTON, Journal of Electronic Materials, 22, 319 (1993)
3) S. Im, D.Y.C. Lie, and M.-A. Nicolet "Advantage of short over long annealing to activate As implanted in metastable psedomorphic Ge0.08Si0.92layers on Si(100)", Journal of Applied Physics, to be published in the issue of 5/1/1996.

10:20AM, AA6+

"Degradation of Oxides Exposed to Si2H6/Cl2/H2 Epitaxy Processes:" C.C. HOBBS, P.A. O'Neil, H.H. Heinisch, I. Ban, S.M. Celik, P. Shamaro, M.C. Öztürk, J.J. Wortman, North Carolina State University, ECE Department, Box 7911, Raleigh, NC 27695

In the fabrication of advanced MOSFET and BJT structures, selective silicon epitaxy offers new degrees of freedom. Using a Si-C1-H gas system, selective epitaxy has been used to fabricate several novel device structures1. Unfortunately, these gases can create damage to an exposed oxide. In previous studies using SiH2Cl2,HCl, and H2, the observed degradation was attributed to the silicon gas species creating a volatile SiO product at pre-existing oxide defects2. However, in these experiments, chlorine was present due to SiH2C12 decomposition.

This paper presents research results on degradation occurring to oxides exposed to Si2H6/CI2/H2 based RTCVD selective silicon epitaxy processes3. Using these source gases, the silicon and chlorine gas species are completely decoupled. Silicon epitaxy can be grown selectively to a critical thickness of 1000A using Si2H6 without additional chlorine4. Thus, the effects of silicon gas species on the oxide degradation can be completely isolated from that of chlorine.

Test structures consisting of 1000 um X 1000 um capacitors were fabricated and tested using gate quality thermal oxide exposed to CI2 and Si2H6/H2, and Si2H6/CI2/H2 gas mixtures in a UHV RTCVD reactor. The exposure temperature was varied from 750deg.C to 850deg.C and the capacitor oxide thickness was varied from 75 è to 305 è.

Leakage current and electric field breakdown (EBD) measurements were used to determine the amount of oxide degradation. For each oxide exposed to a Cl2 or Si2H6/CI2/H2 ambient, no degradation in the EBD was found. However the EBD was found to be significantly lower for the Si2H6/H2 gas ambient. Using the 75è oxide exposed at 850deg.C as an example, the mean EBD was found to be 11.2 MV/cm and 0.8 MV/cm for the pure CI2 and Si2H6/H2 gas ambients, respectively. The data indicates that silicon supplied by the Si2H6 is primarily responsible for the degradation via volatile SiO formation. The addition of chlorine in the presence of disilane reduces the degradation by etching the silicon adatoms from the oxide surface before SiO formation can occur. These results are consistent with previous findings using SiH2CI2. A degradation model for the general Si-CI-H gas system, based upon SiO formation, will be discussed.


1. M. Goulding, J. de Phys. C2 1,745 (1991)
2. C. Hobbs, M. Ozturk, and J. Wortman, EMC (1995)
3. K. Violette, P. O'Neil, M. Ozturk, et al, Appl. Phys. Lett. 68 1 (1996)
4. K. Violette, M. Sanganeria, M. Ozturk, et al, J. Electrochem. Soc. 141 11(1994)

10:40AM, AA7

"Gas-Phase-Reaction-Controlled Atomic-Layer-Epitaxy of Silicon:" M. MATSUMURA, E. Hasunuma, S. Sugahara, S. Hoshino, S. Imal, Department of Physical Electronics, Tokyo Institute of Technology, 2-12-2, O-Okayama, Meguro-ku, Tokyo 152, Japan

We propose here a novel atomic-layer-epitaxy (ALE) of Si with controlled gas-phase-reaction rate of SiH2C12. Experimental results are also presented.

First successful Si-ALE has been demonstrated by alternating exposures of SiH2C12 and atomic hydrogen (1). C1 atoms bond with Si atoms on the substrate surface in a mono--chloride form during the Si-adsorption phase in an ALE cycle. Thus, an ideal 1ML/cycle growth rate will be achieved only when SiHC1 radicals predominate other precursors having two C1 atoms, such as SiH2C12 or SiC12(2). Since SiC12 radicals are both predominately by thermal dissociation of SiH2C12, gas-phase-reaction triggered by collisions of molecules should be introduced for dense SiHC1 radicals. We have satisfied this condition by high pressure and long residence time of the source gas.

ALE characteristics have been investigated for the Si(111) surface. Under low gas pressure or short gas residence time conditions, the growth rate was saturated at much less than 1ML/cycle within a wide temperature range even for sufficient gas exposures. The rate was increased with the pressure or the residence time, and saturated at 1ML/ cycle for more than 4mTorr and 0.2s, respectively. The temperature window was about 60deg.C. The growth rate under high pressure and long residence time conditions, was increased very quickly with the gas exposure time and reached to about 0.5ML/cycle within 1s after the start of exposure, and then it was increased gradually, saturating at 1ML/cycle for more than 10s exposure. These results can be explained well by existence of dense SiHC1 radicals, and we can imagine the substrate surface dynamics such that (1) SiHC1 chemisorbs dissociatively, with the SiC1 and H coverage factors of 0.5ML, respectively, on the Si surface cleaned by atomic hydrogen exposure in a preceding ALE cycle, and that (2) the chemisorbed H atoms are thermally-desorbed gradually from the surface during the gas exposure phase, resulting in the increased SiC1 coverage factor to 1ML for long exposures. Amount of SiHC1 generated near the substrate surface was estimated more than 2.5% of SiH2C12. We also concluded that SiC12 radicals are very few.


(1) S. Imai et al, Thin Solid Films, 225, p. 168(1993)
(2) S. Sugahara et al, To be published in Applied Surface Science

11:00AM, AA8+

"Electronic Properties and Gettering of Iron in p-Type Silicon:" SONG ZHAO, Sang H. Ahn, Hiroshi Nakashima, Jorg Palm, L.C. Kimerling, Department of Materials Science and Engineering, Massachusetts Institute of Technology, 77 Massachusetts Avenue, Cambridge, MA 02139, Department of Electrical Engineering, Kyushu University of Fukuoka 812, Japan

Fe is the most dangerous contaminant in silicon solar cell processing because of its high diffusion coefficient and high solubility in silicon, and its detrimental effect as minority carrier lifetime killer. Gettering processes are integrated into device processing to remove mobile contaminants. We have investigated the recombination behavior and gettering of Fe for silicon wafers. The interstitial Fei and Group III impurities (B1 Al, Ga, In) form iron- acceptor (FejAs) pairs in silicon. Both isolated Fei and FeiAs pairs introduce deep levels in the bandgap, which act as recombination centers causing the decrease of minority carrier lifetime. Gettering occurs by solid phase segregation into p+ region, liquid phase segregation to molten Al during contact formation, and outdiffusion to surfaces at interfaces.

Fe gettering by backside Al contact formation for B-doped p-type silicon ([B]>>[Fe]) is a normal process in solar cell fabrication. We describe, for the first time, the gettering process of Fe quantitatively. The donor level (Fei+/++Bs-)deg./+ at Ev+0.10eV is used as the fingerprint to determine Fe concentration by DLTS measurements. The minority carrier lifetime and diffusion length are measured by EBIC and RFPCD techniques. The results show that the gettering efficiency by backside Al contact achieves >= 98% removal of Fe for Fe-contaminated silicon with [Fe]=l.lxlO14cm-3 under 800deg.C anneal for two hours. The gettering is predominantly induced by solid phase segregation since the solubility of Fe in Al-Si alloy is higher than that in silicon. Variation of the annealing temperature and time shows that gettering efficiency increases with temperature to 1000deg.C. We present a model for Fe gettering that includes the roles of temperature, time, solubility, and nucleation precipitates. The FeiBs pair dissociation and Fei migration are two fundamental kinetic processes involved in solubility enhancement.

The gettering kinetics can only be well understood on the basis of comprehensive knowledge of FeiAs pairs. We have simulated the Fei and As pairing process in a static silicon lattice within the framework of an ionic model considering elastic and electrostatic interactions. Different from the conventional point charge ionic model, our calculations include a correction that takes into account valence electron cloud-polarization which adds a short range, attractive interaction in the FeiAs pair bonding, and silicon lattice relaxation due to the atomic size difference. For the first time, we can explain quantitatively, within one model, the trends among the FeiAs pair deep level positions, configurational symmetries, and bistability.

11:20AM, AA9


11:40AM, AA10


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