Friday Morning Sessions (June 28) TMS Logo

About the 1996 Electronic Materials Conference: Friday Morning Sessions (June 28)

June 26-28, 1996 · 38TH ELECTRONIC MATERIALS CONFERENCE · Santa Barbara, California

Session Z: Pb-Salt Infrared Materials

Session Chairman: T.C. Harman, Massachusetts Institute of Technology, Lincoln Lab., PO Box 73, Lexington, MA 02173. Co-Chairman: R.M. Biefeld, Dept. 1126, PO Box 5800, MS 0601, Sandia National Lab, Albuquerque, NM 87185-0601

8:20AM, Z1

"Reduction of Dislocation Densities in Heavily Lattice Mismatched Epitaxial PbSe Layers on Si(111) by Patterning:" H. ZOGG, A. Fach, J. John, P. Mueller, C. Paglino, A.N. Tiwari, M. Krejci, AFIF at Swiss Federal Institute of Technology, ETH-Teil Technopark, CH-8005 ZÅrich, Switzerland

Misfit dislocations in epitaxial narrow gap IV-VI layers are highly mobile. We found that for high quality PbSe layers on Si(111) substrates (highest quality is achieved with the aid of a few monolayer thick CaF2 buffer layer), the threading ends of misfit dislocations are able to move over appreciable distances. These dislocations glide in the three equivalent (100) main glide planes which are inclined by 35.3deg. with respect to the (111)-interface. Nearly no interaction, which leads to blocking of the dislocations, occurs when two such threading ends cross. This is contrary to the well known glide properties in heavily lattice mismatched III-V on Si(100) layers. In the PbSe on Si(111) system (lattice mismatch - 12%), the mean free path before such an interaction which blocks further movements occurs is estimated to be in the cm range. Therefore, good chances exist to obtain very low dislocation densities by patterning the layers.

The experiments were performed with about 5 um thick PbSe layers which exhibited rocking curve widths of about 100 arcsec. Due to the thermal mismatch between PbSe and Si, temperature cycles (RT to 300deg.C) cause a strain field which moves the threading ends of the misfit and thermal strain relieving dislocations. The etch pit density is dramatically reduced from the 108 cm-2 range to below 106 cm-2 after such cycling in the interior of the islands. This can immediately be applied to the fabrication of improved infrared sensor arrays for thermal imaging applications in epitaxial IV-VI on Si layers.

However, towards some, but not all of the edges, an increased etch pit density is observed. Since the strain field decreases towards zero at the edges of islands, the strain near these boundaries seems therefore not to be sufficient to completely sweep out the dislocations. If complete sweep-out occurs, or if a region of increased etch pit density is observed depends on the line direction of the edge with respect to the crystallographic orientation. Therefore, by properly shaping the patterns, boundary regions with increased etch pit densities can be avoided, leading to complete islands with extremely low etch pit densities.

8:40AM, Z2

"Material Properties of Pb1-xSnxSe Epilayers on Si and their Correlation with the Performance of Infrared Photodiodes:" A. FACH, J. John, P. MÅeller, C. Paglino, H. Zogg, AFIF at Swiss Federal Institute of Technology, ETH-Teil Technopark, CH-8005 ZÅrich, Switzerland

The operability of photodiode arrays in epitaxial Pb1-xSnxSe-layers on Si for the 8-12 um spectral range has been demonstrated with their application in a thermal imaging camera [1]. Despite the large dislocation density in the epitaxial layers in the 107 to 108 cm-2 range, caused by ~ 12% lattice mismatch between Pb1-xSnxSe and Si, photovoltaic devices of good quality have been obtained. This is in contrast to good CMT devices where dislocation densities should be about 100 times lower.

The goal of this work was to find out how defects in the Pb1-xSnxSe-layers influence the performance of the photovoltaic devices. A large number of Pb1-xSnxSe samples with about 3 um layer thickness and prepared under different growth conditions leading to different material quality were investigated. In these layers arrays of 2 x 128 diodes were fabricated using lead as a blocking contact. We have developed an etch process to determine the dislocation density (etch pit densities, EPDs). The dislocation densities are evaluated by EPDs and x-ray rocking curve measurements. We therefore made a detailed investigation of dislocation densities, carrier mobilities at low (< 20K) temperatures where the mobility is limited by defect scattering, and inverse leakage currents (resistance area products R0A) of the devices.

The R0A-products increase by more than a factor of 100 when the low temperature carrier mobilities of the samples increase from 30,000 to 200,000 cm2/Vsec. This change in mobility correlates with a decrease in the EPDs of the layers from the 108 cm-2 range to the low 107 cm-2 range.

Therefore, the influence of dislocations on the device performance has been clearly shown. The reduction of dislocation densities will yield a further improvement in the device quality.


[1] H. Zogg, A. Fach, J. John, J. Masek, P. Müller, C. Paglino, S. Blunier, Opt. Engineering 34, 1995, pp. 1964-1969.

9:00AM, Z3+

"LPE Growth of Crack-Free PbSe Layers on (100)-Oriented Silicon Using PbSe/BaF2/CaF2 Buffer Layers Grown by MBE:" BRIAN N. STRECKER, Xiao-Ming Fang, Kevin R. Lewelling, Patrick J. McCann, School of Electrical Engineering, University of Oklahoma, 202 W. Boyd, Room 219, Norman, OK 73019

Liquid phase epitaxial (LPE) growth of crack-free PbSe layers on (100)Si using molecular beam epitaxy (MBE) grown buffer layers is described. These layers exhibit excellent LPE surface morphologies (surface roughness ~ 0.1 um) that are significantly better than those obtained by LPE growth on polished (100)BaF2 substrates (surface roughness ~ 1 um) [1]. This work shows that it is important to use an MBE-grown PbSe/BaF2/CaF2 buffer layer structure; attempts to grow LPE layers on BaF2/CaF2/(100)Si structures produced poor layers with crack densities near 104 cm-2. High quality LPE layer growth was possible despite the fact that the MBE-grown PbSe layer had a crack density greater than 107 cm-2. The MBE-grown PbSe layer, although cracked at room temperature, effectively becomes a continuous layer at the onset of LPE growth, when the temperature is about 100deg.C greater than the MBE growth temperature. It is believed that the equilibrium nature of LPE growth produces a higher crystalline quality material that can absorb the tensile strain resulting from thermal expansion mismatch with the silicon substrate.

In addition to enabling growth of high quality LPE layers, growth on (100)Si allows the use of epitaxial lift off (ELO) to fabricate lasers since the BaF2 buffer layer is water soluble and can function as a release layer. SEM micrographs show that PbSe epilayers removed from the Si substrate have parallel {100} cleaves and form cavities suitable for laser oscillation. Such epilayer laser structures can be sandwiched between two copper heat sinks to enhance active region heat dissipation. Since these devices will not have thermally resistive IV-VI semiconductor substrates, a large improvement in operating temperature can be expected.


[1] P. J. McCann, L. Li, J. E. Furneaux and R. Wright, Appl. Phys. Lett. 66, 1355 (1995).

9:20AM, Z4

"Epitaxial Lift-Off Techniques Applied to Fabrication of IV-VI Semiconductor Tunable Infrared Lasers:" KEVIN R. LEWELLING, Patrick J. McCann, School of Electrical Engineering, University of Oklahoma, 202 W. Boyd, Room 219, Norman, OK 73019

PbTe and PbSe substrates are currently used for IV-VI semiconductor laser fabrication; however, these substrates are poor thermal conductors resulting in considerable buildup of heat in the active region during laser use. It has recently been shown that IV-VI semiconductor double heterojunction (DH) laser structures can be grown on BaF2 [1]. Since BaF2 is water soluble, such laser structures can be removed from the growth substrate and transferred to a more thermally conductive material. A modified version of the well-known epitaxial lift-off (ELO) process is presently under development at the University of Oklahoma to obtain such a device. The technique involves bonding the epilayer structure to the edges of an assembly of copper plates. Removing the BaF2 and subsequently releasing the plates cleaves the epilayer(s) thus forming the Fabry-Perot resonant cavities needed for lasing.

Currently, 203 K [2] is the highest continuous wave (cw) operating temperature for a IV-VI semiconductor laser grown on PbTe substrates. This temperature is too low for the employment of thermoelectric-cooling elements thus necessitating liquid nitrogen cooling. Since our new process effectively replaces PbTe with thermally conductive copper, a large improvement in laser operating temperatures can be expected. Finite element modeling conservatively predicts a 50deg.C increase in operating temperature when PbTe is replaced with copper. This 50deg.C increase will greatly simplify laser operation by enabling use of thermoelectric cooling elements. A detailed description of our modified ELO technique, SEM pictures of cleaved laser cavity edges, and results from thermal modeling will be included in the presentation.


[1] I. Chao, S. Yuan and P.J. McCann, International Device Research Symposium, Charlottesville, VA, December 6-8, 1995. Published in Proceedings 1995 International Semiconductor Device Research Symposium, Volume II, p. 505, University of Virginia, Charlottesville, VA (1995).
[2] Z. Feit, D. Kostyk, R. J. Woods and P. Mak, Appl. Phys. Lett. 58, 343 (1991).

9:40AM, Z5

"Corrugated Quantum Well Infrared Photodetectors for Broadband and Multi-Color Infrared Detection:" C.J. CHEN, K.K. Choi, D.C. Tsui, Dept. of Electrical Engineering, Princeton University, Princeton, NJ 08544; U.S. Army Research Laboratory, Fort Monmouth, NJ 07703

In this talk, we describe a new quantum well infrared photodetector (QWIP) geometry for normal incident light coupling, which we refer here as the corrugated QWIP (C-QWIP). In this structure, 1-D V-grooves or 2-D crossed grid patterns are chemically etched through the active detector region to create a collection of angled facets within a single detector pixel. These facets then direct normal incident light into the QWIP through total internal reflection (TIR) for one polarization and through single-slit diffraction for another. Thin polyimide film is used for contact isolation before the top metal contact is deposited. In order to demonstrate the advantages of this light coupling scheme, a two-color C-QWIP covering the two infrared atmospheric windows as well as a relatively broadband single-color C-QWIP around 10 um is used for study. The C-QWIP structure has a number of advantages over the existing approaches: (1) Unlike grating effect which diminishes with decreasing number of grating periods, the C-QWIP geometry is relatively independent of the pixel size. (2) The detector cross-talk can be greatly reduced. (3) Since TIR is wavelength independent, there is little spectral narrowing effect. (4) Due to partial removal of the active detector region, the dark current is substantially reduced. (5) Finally, C-QWIP device processing is simpler. There is no stringent requirement on structural parameters such as grating period and etching depth. Also, wet chemical etching does not cause possible material damage as plasma etching. Experimental data from the initial devices with unthinned substrate show efficient light coupling. The 1-D corrugated structure has comparable coupling efficiency as that of the 45deg. incident sample in both the mid-infrared and long-infrared windows. The 2-D structure has a 1.5 times higher quantum efficiency because both polarizations of the normal incident light are coupled into the QWIP. All spectral responses show negligible narrowing effect compared with grating coupled samples. Therefore, the C-QWIP structure is ideal for broadband or multi-color infrared detection. With optimized structural parameters and thinned substrate, the performance of the C-QWIPs is expected to be further improved by more than a factor of two.

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