Program Organizers: Professor Krishna Rajan, Materials Science and Engineering Department, Rensselaer Polytechnic Institute, Troy, NY 12180-3590; Dr. Michael Fury, Rodel Inc., 451 Bellvue Road, Newark, DE 19713
Location: Anaheim Marriott Hotel
Session Chairperson: Dr. Michael Fury, Rodel Inc., 451 Bellvue Road, Newark, DE 19713
A MATERIALS SCIENCE PERSPECTIVE OF CHEM-MECHANICAL PLANARIZATION: Krishna Rajan, Department of Materials Science and Engineering, Rensselaer Polytechnic Institute, Troy, NY 12180-3590
The ever decreasing dimensions in multi-level interconnects dictates the need to incorporate the microstructural and atomistic level issues in understanding the mechanisms controlling chem-mechanical planarization technologies. In this presentation, we present an overview of where the "science-technology gap" exists in this emerging field and how fundamental materials science research can play a pivotal role in enhancing and controlling planarization technology in multi-level metallization.
9:00 am Invited
OXIDE-METAL INTERACTIONS AND THEIR EFFECTS ON MECHANICAL POLISHING: R. Gibala, Department of Materials Science and Engineering, University of Michigan, Ann Arbor, MI 48109-2136
In the chemical/mechanical polishing (CMP) for planarization of insulator and conductor layers in multi-level metallization interconnect structures, many of the resulting oxide-metal interface microstructures are subject to mechanical stresses that can have large effects on device performance and reliability. This paper examines mechanisms by which surface oxides can alter the mechanical properties of refractory metal and intermetallic alloy substrates. Experiments demonstrate, for example, that some oxide-coated metals and intermetallics (e.g., Nb, Ta, Mo, W, NiAl, FeAl, MoSi2) can exhibit enhanced plasticity and reduced flow stresses relative to the uncoated material. Such effects depend significantly on oxide properties, interface stresses, surface topography of the substrate and dislocation mobilities and source densities. As the dislocation mean free path increases relative to the material dimensions, as in CMP-processed systems, these effects can become especially important.
9:30 am Invited
MATERIALS SCIENCE RESEARCH OPPORTUNITIES IN CHEM-MECHANICAL PLANARIZATION (CMP): Mukesh Desai, Chris Karlsrud, Inki Kim, Jim Schlueter, SpeedFam Corp., 7406 W. Detroit, Chandler, AZ 85226
CMP is an old technology with practical applications in making lenses, silicon wafers, hard disks (storage media), etc. Materials used in fabrication of CMP equipment and consumables are as old as these applications. Recent application of CMP in IC fabrication has brought a new level of attention from researchers. Application of CMP in IC fabrication requires a higher level of performance than traditional CMP applications. The challenge of meeting these needs will require a concurrent improvement in materials used in fabrication of equipment and consumables used in CMP along with reduction of their cost. This paper will attempt to review the current understanding of the technology and point out material properties issues which are dominating current and future performance needs of CMP.
10:00 am BREAK
SURFACE MEASUREMENTS OF CMP PADS WITHIN A SINGLE POLISH CYCLE: D.L. Hetherington, S.M. Kempka, M.T. Dugger, Sandia National Laboratories, Albuquerque, NM 87185; D.J. Stein, University of New Mexico, Chemical and Nuclear Engineering Department, Albuquerque, NM 87131
Time variation in pad topology during Chemical-Mechanical Polishing (CMP) is examined experimentally. Topology measurements, in situ, are made using a WYKO non-contact optical surface profilometer. A principal undesirable feature of CMP is that the removal rate decreases with time during a single polish cycle. Polishing increases the surface area of contact between the wafer and pad, resulting in a reduction of the pressure each asperity applies to the surface. We characterize the effects of pressure and rotation speeds on the surface topology of an IC1000 pad as a function of time within a polishing cycle. Numerical volume and surface area data are determined from 300 um x 300 um imaged surface profiles. We discuss the implications of the change in these values as a function of polishing time. The results of this study provide a partial mechanistic basis for the development of planarization models to allow for optimization of CMP processes.
10:50 am Invited
CHARACTERISTICS OF SCRATCHING ON BEOL CMP: Thom Sandwick, Bill Cote, William Landers, IBM Microelectronics Division, Hopewell Junction, NY 12533
Chemical Mechanical Polishing (CMP) of oxides is commonly used for BEOL planarization of semiconductors. There is also a growing interest in the polishing of metals to form damascene studs and wiring. This type of process has a unique set of problems and requirements that have not traditionally been addressed. A key problem of damascene processing is CMP scratching, which leaves a unique defect signature. Since damascene patterning leaves metal in the recessed areas by design, and a scratch is a random recessed area, the scratch can cause electrical shorts at subsequent damascene or RIE defined line levels. Scratching may be caused by the pad, slurry tool, environment of even possibly the wafers. This paper will review the characteristics and possible mechanisms to understand the effects of CMP and scratching. The effects of many of these variables on scratching will also be discussed.
11:20 am Invited
EFFECT OF ELECTROCHEMICAL PARAMETERS ON SURFACE MORPHOLOGY: R. Ricker, National Institute of Standards and Technology, Gaithersburg, MD 20899
Abstract not available.
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